Intel 386 Manual do Utilizador descarregar pdf (Página 392)

100

101

12-57

DMA CONTROLLER

*****************************************************************************/

int SetDMAXferCount(int nChannel, DWORD lCount)

{

WORD addrDMAByc0_1;

WORD addrDMAByc2;

/*Check input*/

if ( (nChannel != DMA_Channel0) && (nChannel != DMA_Channel1) )

return ERR_BADINPUT;

/*Set registers to correct channel*/

addrDMAByc0_1 = (nChannel == DMA_Channel0 ? DMA0BYC0_1 : DMA1BYC0_1);

addrDMAByc2 = (nChannel == DMA_Channel0 ? DMA0BYC2 : DMA1BYC2);

_SetEXRegByte(DMACLRBP, 0x0); /* Clear the byte pointer flip-flop */

/* Write count, bits 0-7 */

_SetEXRegByte(addrDMAByc0_1, (BYTE) ( lCount & 0xFF));

/* Write count, bits 8-15 */

_SetEXRegByte(addrDMAByc0_1, (BYTE) ((lCount >> 8) & 0xFF));

/* Write count, bits 16-23 */

_SetEXRegByte(addrDMAByc2, (BYTE) ((lCount >> 16) & 0xFF));

return ERR_NONE;

}

/*****************************************************************************

InitDMA:

Description:

Enables the DMA and initializes settings independent of the

two channels:

bus arbitration--set to no rotation, external bus master

request(HOLD) assigned to lowest priority level

EOP# sampling--set to asynch. (no effect when DMA is used

with internal peripherals)

DRQn sampling--set to synch. (no effect when DMA is used

with internal peripherals)

Parameters:

None

Returns:

None

Assumptions:

None

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