Intel RH80532NC033256 Ficha Técnica descarregar pdf (Página 57)

Mobile Intel

Celeron

Processor (0.13 µ)

Micro-FCBGA and Micro-FCPGA Packages Datasheet

298517-006 Datasheet 57

Figure 21. Quick Start/Deep Sleep Timing (DPSLP# Assertion Method)

stpgnt

BCLK

STPCLK#

CPU bus

DPSLP#

Compatibility

Signals

Changing

Normal Quick Start Deep Sleep

Quick Start

Normal

Frozen

V00103-00

NOTES:

=T45 (Stop Grant Acknowledge Bus Cycle Completion to DPSLP# assertion)

= T46 (Setup Time to Input Signal Hold Requirement)

=T47 (Deep Sleep PLL Lock Latency)

=T48 (PLL lock to STPCLK# Hold Time)

=T49 (Input Signal Hold Time)

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Intel RH80532NC033256 Ficha Técnica Página 57