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48 Specification Update

BV96. IA32_MC5_CTL2 is Not Cleared by a Warm Reset

Problem: IA32_MC5_CTL2 MSR (285H) is documented to be cleared on any reset. Due to this

erratum this MSR is only cleared upon a cold reset.

Implication: The algorithm documented in Software Developer's Manual, Volume 3, section titled

"CMCI Initialization” or any other algorithm that counts the IA32_MC5_CTL2 MSR being

cleared on reset will not function as expected after a warm reset.

Workaround: None identified.

Status: For the steppings affected, see the Summary Tables of Changes.

BV97. CPUID Instruction May Not Report the Processor Number in the Brand

String for Intel® Core™ i3-3227U and i5-3337U Processors.

Problem: When the CPUID instruction is executed with EAX = 80000002H, 80000003H, and

80000004H, the returned brand string may be incomplete; it may be missing the

processor number.

Implication: When this erratum occurs, the processor may be missing the processor number in the

brand string. In addition, if the affected processors are paired with the Intel® 7 Series

Chipset BD82UM77 chipset, the BIOS may incorrectly report this combination as

unsupported.

Workaround: It is possible for the BIOS to contain a workaround for this erratum, except if paired

with the Intel 7 Series Chipset BD82UM77 chipset.

Status: For the steppings affected, see the Summary Tables of Changes.

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Intel I5 Manual do Utilizador Página 48