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Electrical Specifications
22 Datasheet
3.4 Catastrophic Thermal Protection
The processor supports the THERMTRIP# signal for catastrophic thermal protection. An
external thermal sensor should also be used to protect the processor and the system
against excessive temperatures. Even with the activation of THERMTRIP#, which halts
all processor internal clocks and activity, leakage current can be high enough that the
processor cannot be protected in all conditions without power removal to the processor.
If the external thermal sensor detects a catastrophic processor temperature of 125 °C
(maximum), or if the THERMTRIP# signal is asserted, the V
CC
supply to the processor
must be turned off within 500 ms to prevent permanent silicon damage due to thermal
runaway of the processor. THERMTRIP# functionality is not guaranteed if the
PWRGOOD signal is not asserted.
3.5 Reserved and Unused Pins
All RESERVED (RSVD) pins must remain unconnected. Connection of these pins to V
CC
,
V
SS
, or to any other signal (including each other) may result in component malfunction
or incompatibility with future processors. See Section 4.2 for a pin listing of the
processor and the location of all RSVD pins.
For reliable operation, always connect unused inputs or bidirectional signals to an
appropriate signal level. Unused active low AGTL+ inputs may be left as no connects if
AGTL+ termination is provided on the processor silicon. Unused active high inputs
should be connected through a resistor to ground (V
SS
). Unused outputs can be left
unconnected.
The TEST1 and TEST2 pins must have a stuffing option of separate pull-down resistors
to V
SS
.
For the purpose of testability, route the TEST3 and TEST5 signals through a ground-
referenced Zo = 55-Ω trace that ends in a via that is near a GND via and is accessible
through an oscilloscope connection.
1 1 1 0 1 0 0 0.0500
1 1 1 0 1 0 1 0.0375
1 1 1 0 1 1 0 0.0250
1 1 1 0 1 1 1 0.0125
1 1 1 1 0 0 0 0.0000
1 1 1 1 0 0 1 0.0000
1 1 1 1 0 1 0 0.0000
1 1 1 1 0 1 1 0.0000
1 1 1 1 1 0 0 0.0000
1 1 1 1 1 0 1 0.0000
1 1 1 1 1 1 0 0.0000
1 1 1 1 1 1 1 0.0000
Table 2. Voltage Identification Definition (Sheet 4 of 4)
VID6 VID5 VID4 VID3 VID2 VID1 VID0 V
CC
(V)
- Dual-Core on 45-nm Process 1
- 2 Datasheet 2
- Contents 3
- 4 Datasheet 4
- Revision History 5
- 6 Datasheet 6
- 1 Introduction 7
- 1.1 Terminology 8
- 1.2 References 9
- Introduction 10
- 10 Datasheet 10
- 2 Low Power Features 11
- 2.1.1 Core Low-Power States 12
- Datasheet 13 13
- Low Power Features 13
- 2.1.2.4 Sleep State 14
- 2.1.2.6 Deeper Sleep State 15
- 2.1.2.5 Deep Sleep State 15
- 2.3 Low-Power FSB Features 16
- Datasheet 17 17
- 18 Datasheet 18
- 3 Electrical Specifications 19
- 3.5 Reserved and Unused Pins 22
- 3.7 FSB Signal Groups 23
- Table 4. FSB Pin Groups 24
- 3.8 CMOS Signals 25
- 3.9 Maximum Ratings 25
- Electrical Specifications 26
- 26 Datasheet 26
- Processors 28
- 4 Package Mechanical 33
- Specifications and Pin 33
- Information 33
- 34 Datasheet 34
- Datasheet 35 35
- 36 Datasheet 36
- Datasheet 37 37
- 38 Datasheet 38
- (Sheet 1 of 2) 39
- (Sheet 2 of 2) 40
- Datasheet 41 41
- 42 Datasheet 42
- Datasheet 43 43
- 44 Datasheet 44
- (Sheet 1 of 16) 45
- (Sheet 2 of 16) 45
- (Sheet 3 of 16) 46
- (Sheet 4 of 16) 46
- (Sheet 5 of 16) 47
- (Sheet 6 of 16) 47
- (Sheet 7 of 16) 48
- (Sheet 8 of 16) 48
- (Sheet 9 of 16) 49
- (Sheet 10 of 16) 49
- (Sheet 11 of 16) 50
- (Sheet 12 of 16) 50
- (Sheet 13 of 16) 51
- (Sheet 14 of 16) 51
- (Sheet 2 of 17) 53
- (Sheet 3 of 17) 53
- (Sheet 4 of 17) 54
- (Sheet 5 of 17) 54
- (Sheet 6 of 17) 55
- (Sheet 7 of 17) 55
- (Sheet 8 of 17) 56
- (Sheet 9 of 17) 56
- (Sheet 10 of 17) 57
- (Sheet 11 of 17) 57
- (Sheet 12 of 17) 58
- (Sheet 13 of 17) 58
- (Sheet 14 of 17) 59
- (Sheet 15 of 17) 59
- (Sheet 16 of 17) 60
- (Sheet 17 of 17) 60
- 74 Datasheet 74
- together with V 81
- 82 Datasheet 82
- 5 Thermal Specifications and 83
- Design Considerations 83
- 5.1.1 Thermal Diode 85
- 5.1.2 Thermal Diode Offset 87
- 5.1.3 Intel® Thermal Monitor 88
- 5.1.4 Digital Thermal Sensor 89
- 5.1.6 PROCHOT# Signal Pin 90
- Datasheet 91 91
- 92 Datasheet 92
- Datasheet 1 93
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