Intel Personal Computer NetStructure Single Board Computer Manual do Utilizador descarregar pdf (Página 145)

MPCBL0010 SBC—Hardware Management Overview

Intel NetStructure

MPCBL0010 Single Board Computer

Technical Product Specification October 2006

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Intel NetStructure 1
MPCBL0010 1
Single Board Computer 1
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Contents 3
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MPCBL0010— 10
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—MPCBL0010 11
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Revision History 12
1.0 Introduction 13
1.2 Glossary 14
MPCBL0010—Introduction 15
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2.0 Feature Overview 16
2.2.1 Low Voltage Intel 17
Xeon™ Processor 17
2.2.2 Chipset 17
2.2.3 Memory (J10, J12) 18
2.2.4 I/O 19
2.2.4.4 Gigabit Ethernet 20
2.2.4.5 10/100 Fast Ethernet 20
2.2.4.6 USB 2.0 20
2.2.4.7 Serial Ports 20
2.2.6 Firmware Hubs 21
2.2.7 Onboard Power Supplies 22
2.2.8 IPMC 23
2.2.9 Telecom Clock 23
Order Number: 304120 23 24
2.2.11 AdvancedTCA Compliance 25
3.0 Operating the Unit 26
Table 2. Jumper Definitions 27
3.2 AdvancedMC Filler Panels 28
3.3 Installing Memory 29
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3.4.1 Chassis Installation 31
3.4.2 Chassis Extraction 31
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3.6 BIOS Configuration 33
3.8 Software Updates 33
3.8.1 BIOS Updates 34
3.8.3 IPMC Firmware Updates 36
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4.0 Specifications 38
° C ambient temperature 39
4.4 Weight 40
5.0 Connectors and LEDs 41
Figure 11. Front Panel 43
5.1 Backplane Connectors 44
P[C]dxp 46
5.1.4 Alignment Blocks 47
5.2 On-Board Connectors 48
5.3 Front Panel Connectors 49
5.3.2 USB Connector (J4) 50
5.4 LEDs 53
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5.4.1 POST LED Codes 56
5.5 Reset Button 57
6.0 BIOS Features 58
6.5 Legacy USB Support 59
6.6 Recovering BIOS Data 59
6.7 Boot Options 59
6.8 Fast Booting Systems 60
6.9 BIOS Security Features 60
7.0 BIOS Setup 63
7.3 Advanced Menu 64
7.4 PCIPnP Menu 82
7.5 Boot Menu 83
Tab le 54 86
7.8 Exit Menu 88
8.0 Error Messages 90
9.0 Addressing 94
9.2 FPGA Registers 96
Table 68. POST Codes 00:80h 97
9.3 IPMC Addresses 104
Table 84. SBC Control 00h 105
9.3.0.1 PwrBtn usage 106
Table 108. Version FFh 115
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10.2 Sensor Data Record (SDR) 118
Table 110. OEM Sensor Types 121
10.3 System Event Log (SEL) 122
Event Description 123
10.4 IPMB Link Sensor 127
10.6 Customizable FRU Area 128
0’ minus the 129
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10.7 E-Keying 131
10.8 OEM IPMI Commands 131
10.8.1 Reset BIOS Flash Type 132
10.8.3 Set Control State 135
10.8.4 Get Control State 135
10.9 Hot Swap Process 136
10.9.1 Hot Swap LED 137
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10.11.1 Processor Events 140
10.11.2 DIMM Memory Events 140
10.11.4 Critical Interrupts 140
10.12 Reset 141
10.12.1 Warm Reset 142
10.12.2 Hard Reset 142
10.14 IPMC Firmware Code 143
IPMC Boot Block 144
Main IPMC Code 144
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11.0 Serial Over LAN (SOL) 146
11.1 References 146
SOL Architecture 146
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Theory of Operation 148
11.4 Serial Over LAN Client 149
11.6 Supported Usage Model 150
11.7.3 SOL User Information 151
11.7.4 LAN Parameters 151
11.7.5 SOL Parameters 152
11.7.6 Channel Parameters 152
11.7.7 Command Line Options 152
11.8.1 Target Blade Setup 153
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11.8.2 Client Blade Setup 158
11.8.2.2 Installing ipmitool 159
11.8.2.3 Start an SOL Session 159
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12.0 Telecom Clock 162
12.2 Interface Description 163
12.3 Function Description 163
12.3.4 Configuration 164
12.3.5 Alarm Handling 164
12.4 Telecom Clock API 165
12.4.3 Recovered Clock 166
12.4.4 Automatic Switchover 166
12.4.6 Select Reference Clock 167
12.4.9 Corner Frequency 168
12.4.10 PLL Operating Mode 168
12.4.12 Hardware Reset 168
12.4.13 Read Alarm States 169
12.4.14 Read New Events 169
12.4.16 sysfs Interface 170
12.5 Telecom Clock Registers 171
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Telecom Clock—MPCBL0010 SBC 176
13.0 Maintenance 178
14.0 Thermals 179
15.0 Component Technology 180
16.0 Warranty Information 181
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17.0 Customer Support 184
18.0 Certifications 185
19.3 Japan VCCI Class B 186
19.5 Australia, New Zealand 187
19.4 Korean Class B 187
20.0 Safety Warnings 188
20.1 Mesures de Sécurité 189
20.2 Sicherheitshinweise 190
20.3 Norme di Sicurezza 191
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Safety Warnings—MPCBL0010 SBC 192
20.5 Chinese Safety Warning 193
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PICMG 3.0) 196

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