Intel D915GLVGL Ficha Técnica Página 39

  • Descarregar
  • Adicionar aos meus manuais
  • Imprimir
  • Página
    / 84
  • Índice
  • MARCADORES
  • Avaliado. / 5. Com base em avaliações de clientes
Vista de página 38
39
2 Technical Reference
What This Chapter Contains
2.1 Introduction ..................................................................................................................39
2.2 Memory Resources......................................................................................................39
2.3 DMA Channels.............................................................................................................41
2.4 Fixed I/O Map...............................................................................................................42
2.5 PCI Configuration Space Map......................................................................................43
2.6 Interrupts......................................................................................................................44
2.7 PCI Conventional Interrupt Routing Map .....................................................................45
2.8 Connectors...................................................................................................................46
2.9 Jumper Block ...............................................................................................................55
2.10 Mechanical Considerations..........................................................................................56
2.11 Electrical Considerations..............................................................................................58
2.12 Thermal Considerations...............................................................................................60
2.13 Reliability......................................................................................................................62
2.14 Environmental ..............................................................................................................63
2.15 Regulatory Compliance................................................................................................64
2.1 Introduction
Sections 2.2 - 2.6 contain several standalone tables. Table 9 describes the system memory map,
Table 10 lists the DMA channels, Table 11 shows the I/O map, Table 12 defines the PCI
Conventional bus configuration space map, and Table 13 describes the interrupts. The remaining
sections in this chapter are introduced by text found with their respective section headings.
2.2 Memory Resources
2.2.1 Addressable Memory
The board utilizes 4 GB of addressable system memory. Typically the address space that is
allocated for PCI Conventional bus add-in cards, PCI Express configuration space, BIOS (firmware
hub), and chipset overhead resides above the top of DRAM (total system memory). On a system
that has 4 GB of system memory installed, it is not possible to use all of the installed memory due
to system address space being allocated for other system critical functions. These functions include
the following:
BIOS/firmware hub (2 MB)
Local APIC (19 MB)
Digital Media Interface (40 MB)
Front side bus interrupts (17 MB)
PCI Express configuration space (256 MB)
Vista de página 38
1 2 ... 34 35 36 37 38 39 40 41 42 43 44 ... 83 84

Comentários a estes Manuais

Sem comentários