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Document Number: 320120-004Intel® Core™2 Duo Mobile Processor, Intel® Core™2 Solo Mobile Processor and Intel® Core™2 Extreme Mobile Processor on 45-nm

Introduction10 DatasheetNOTE: Contact your Intel representative for the latest revision of this document.§ Volume 2B: Instruction Set Reference, N-Z

Package Mechanical Specifications and Pin Information100 Datasheet§ VCCSENSE OutputVCCSENSE together with VSSSENSE are voltage feedback signals that c

Datasheet101Thermal Specifications and Design Considerations5 Thermal Specifications and Design ConsiderationsA complete thermal solution includes bot

Thermal Specifications and Design Considerations102 DatasheetNOTES:1. The TDP specification should be used to design the processor thermal solution. T

Datasheet103Thermal Specifications and Design ConsiderationsNOTES:1. The TDP specification should be used to design the processor thermal solution. Th

Thermal Specifications and Design Considerations104 DatasheetNOTES:1. The TDP specification should be used to design the processor thermal solution. T

Datasheet105Thermal Specifications and Design ConsiderationsNOTES:1. The TDP specification should be used to design the processor thermal solution. Th

Thermal Specifications and Design Considerations106 DatasheetNOTES:1. The TDP specification should be used to design the processor thermal solution. T

Datasheet107Thermal Specifications and Design ConsiderationsNOTES:1. The TDP specification should be used to design the processor thermal solution. Th

Thermal Specifications and Design Considerations108 Datasheet5.1 Monitoring Die TemperatureThe processor incorporates three methods of monitoring die

Datasheet109Thermal Specifications and Design ConsiderationsNOTES:1. Intel does not support or recommend operation of the thermal diode under reverse

Datasheet11Low Power Features2 Low Power Features2.1 Clock Control and Low-Power StatesThe processor supports low-power states both at the individual

Thermal Specifications and Design Considerations110 Datasheetactive/inactive transitions of the TCC when the processor temperature is near the trip po

Datasheet111Thermal Specifications and Design ConsiderationsBesides the thermal sensor and thermal control circuit, the Intel Thermal Monitor also inc

Thermal Specifications and Design Considerations112 DatasheetChanges to the temperature can be detected via two programmable thresholds located in the

Datasheet113Thermal Specifications and Design Considerationsof time when running the most power-intensive applications. An under-designed thermal solu

Low Power Features12 DatasheetFigure 1. Core Low-Power States C2†C0StopGrantCore statebreakP_LVL2 orMWAIT(C2)C3†CorestatebreakP_LVL3 orMWAIT(C3)C1/MWA

Datasheet13Low Power Features NOTE:1. AutoHALT or MWAIT/C1.2.1.1 Core Low-Power State Descriptions2.1.1.1 Core C0 StateThis is the normal operating st

Low Power Features14 DatasheetThe system can generate a STPCLK# while the processor is in the AutoHALT Powerdown state. When the system deasserts the

Datasheet15Low Power Features2.1.1.7 Core Deep Power Down Technology (Code Name C6) StateDeep Power Down Technology state is a new, power-saving state

Low Power Features16 Datasheet2.1.2.3 Stop-Grant Snoop StateThe processor responds to snoop or interrupt transactions on the FSB while in Stop-Grant s

Datasheet17Low Power Featuresstate, it will not respond to interrupts or snoop transactions. Any transition on an input signal before the processor ha

Low Power Features18 Datasheet2.1.2.6.3 Dynamic Cache SizingDynamic Cache Sizing allows the processor to flush and disable a programmable number of L2

Datasheet19Low Power Features2.2 Enhanced Intel SpeedStep® TechnologyThe processor features Enhanced Intel SpeedStep Technology. Following are the key

2 DatasheetINFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL® PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO A

Low Power Features20 Datasheet2.3 Extended Low-Power StatesExtended low-power states (CXE) optimize for power by forcibly reducing the performance sta

Datasheet21Low Power Features2.4 FSB Low Power EnhancementsThe processor incorporates FSB low power enhancements:• Dynamic FSB Power Down• BPRI# contr

Low Power Features22 DatasheetNOTES:1. All common clock signals will be active for two BCLKs instead of one (e.g., ADS#, HIT#).2. The double-pumped si

Datasheet23Low Power FeaturesWhen in Intel Dynamic Acceleration Technology mode, it is possible for both cores to be active under certain internal con

Low Power Features24 Datasheet

Datasheet25Electrical Specifications3 Electrical Specifications3.1 Power and Ground PinsFor clean, on-chip power distribution, the processor will have

Electrical Specifications26 Datasheet3.3 Voltage Identification and Power SequencingThe processor uses seven voltage identification pins,VID[6:0], to

Datasheet27Electrical Specifications0 1 0 1 0 0 0 1.00000 1 0 1 0 0 1 0.98750 1 0 1 0 1 0 0.97500 1 0 1 0 1 1 0.96250 1 0 1 1 0 0 0.95000 1 0 1 1 0 1

Electrical Specifications28 Datasheet10 10 1 1 10.412510 11 0 0 00.400010 11 0 0 10.387510 11 0 1 00.375010 11 0 1 10.362510 11 1 0 00.350010 11 1 0 1

Datasheet29Electrical Specifications3.4 Catastrophic Thermal ProtectionThe processor supports the THERMTRIP# signal for catastrophic thermal protectio

Datasheet 3Contents1Introduction...71.1 Ter

Electrical Specifications30 Datasheet3.7 FSB Signal GroupsThe FSB signals have been combined into groups by buffer type in the following sections. In

Datasheet31Electrical Specifications1. Refer to Chapter 4 for signal descriptions and termination requirements.2. In processor systems where there is

Electrical Specifications32 Datasheet2. Excessive overshoot or undershoot on any signal will likely result in permanent damage to the processor.3. Sto

Datasheet33Electrical SpecificationsNOTES:1. Each processor is programmed with a maximum valid voltage identification value (VID), which is set at man

Electrical Specifications34 DatasheetNOTES:See next page.Table 7. Voltage and Current Specifications for the Dual-Core, Standard-Voltage ProcessorsSym

Datasheet35Electrical Specifications1. Each processor is programmed with a maximum valid voltage identification value (VID), which is set at manufactu

Electrical Specifications36 DatasheetNOTES:.1. Each processor is programmed with a maximum valid voltage identification value (VID), which is set at m

Datasheet37Electrical SpecificationsNOTES:1. Each processor is programmed with a maximum valid voltage identification value (VID), which is set at man

Electrical Specifications38 Datasheetthat this differs from the VID employed by the processor during a power management event (Intel Thermal Monitor 2

Datasheet39Electrical SpecificationsNOTES:1. Each processor is programmed with a maximum valid voltage identification value (VID), which is set at man

4 Datasheet5.1.3 Digital Thermal Sensor ... 1115.2 Out of Specification Detecti

Electrical Specifications40 DatasheetNOTES:See next page.Table 11. Voltage and Current Specifications for the Dual-Core, Ultra-Low-Voltage SFF Process

Datasheet41Electrical Specifications1. Each processor is programmed with a maximum valid voltage identification value (VID), which is set at manufactu

Electrical Specifications42 DatasheetNOTES:1. Each processor is programmed with a maximum valid voltage identification value (VID), which is set at ma

Datasheet43Electrical SpecificationsFigure 4. Active VCC and ICC Loadline for Standard Voltage, Low-Power SV (25 W) and Dual-Core, Extreme Edition Pro

Electrical Specifications44 DatasheetNOTE: Deeper Sleep mode tolerance depends on VID value.Figure 5. Deeper Sleep VCC and ICC Loadline for Standard-V

Datasheet45Electrical SpecificationsNOTES:1. Applies to low-power standard-voltage 22-mm (dual-core) processors.2. Deeper Sleep mode tolerance depends

Electrical Specifications46 DatasheetNOTES:1. Applies to Low-Voltage, Ultra-Low-Voltage and Power Optimised Performance processors in 22 mmx22 mm pack

Datasheet47Electrical SpecificationsNOTES:1. Applies to Low-Voltage, Ultra-Low-Voltage and Power Optimised Performance processors in 22 mmx22 mm packa

Electrical Specifications48 DatasheetNOTES:1. Unless otherwise noted, all specifications in this table apply to all processor frequencies.2. VIL is de

Datasheet49Electrical SpecificationsNOTES:1. Unless otherwise noted, all specifications in this table apply to all processor frequencies.2. The VCCP r

Datasheet 516 Pin Name Listing ... 6117 Pin # Listi

Electrical Specifications50 Datasheet

Datasheet 51Package Mechanical Specifications and Pin Information4 Package Mechanical Specifications and Pin Information4.1 Package Mechanical Specifi

Package Mechanical Specifications and Pin Information52 DatasheetFigure 9. 6-MB and 3-MB on 6-MB Die Micro-FCPGA Package Drawing (Sheet 1 of 2)B6887-0

Package Mechanical Specifications and Pin InformationDatasheet 53Figure 10. 3-MB die Micro-FCPGA Processor Package Drawing (Sheet 1 of 2)B6739-01D7656

Package Mechanical Specifications and Pin Information54 DatasheetFigure 11. 3-MB Die Micro-FCPGA Processor Package Drawing (Sheet 2 of 2)B6740-01D7656

Package Mechanical Specifications and Pin InformationDatasheet 55Figure 12. 3-MB Die Micro-FCBGA Processor Package Drawing (Sheet 1 of 2)B6741-01D9370

Package Mechanical Specifications and Pin Information56 DatasheetFigure 13. 3-MB Die Micro-FCBGA Processor Package Drawing (Sheet 2 of 2)B6742-01D9370

Datasheet 57Package Mechanical Specifications and Pin InformationFigure 14. Intel Core 2 Duo Mobile Processor (POP and LV) Die Micro-FCBGA Processor P

Package Mechanical Specifications and Pin Information58 DatasheetFigure 15. Intel Core 2 Duo Mobile Processor (ULV SC and ULV DC) Die Micro-FCBGA Proc

Datasheet 59Package Mechanical Specifications and Pin Information4.2 Processor Pinout and Pin ListFigure 16 and Figure 17 show the processor (SV and X

6 DatasheetRevision History§ Document NumberRevision NumberDescription Date320120 -001 Initial Release July 2008320120 -002• Chapter Update— Chapter 1

Package Mechanical Specifications and Pin Information60 DatasheetFigure 17. Processor Pinout (Top Package View, Right Side)14 15 16 17 18 19 20 21 22

Package Mechanical Specifications and Pin InformationDatasheet 61Table 16. Pin Name ListingPin Name Pin #Signal Buffer TypeDirectionA[3]# J4Source Syn

Package Mechanical Specifications and Pin Information62 DatasheetBPRI# G5Common ClockInputBR0# F1Common ClockInput/OutputBSEL[0] B22 CMOS OutputBSEL[1

Package Mechanical Specifications and Pin InformationDatasheet 63D[36]# V23Source SynchInput/OutputD[37]# T22Source SynchInput/OutputD[38]# U25Source

Package Mechanical Specifications and Pin Information64 DatasheetDSTBP[2]# AA26Source SynchInput/OutputDSTBP[3]# AF24Source SynchInput/OutputFERR# A5O

Package Mechanical Specifications and Pin InformationDatasheet 65VCC A9Power/OtherVCC A10Power/OtherVCC A12Power/OtherVCC A13Power/OtherVCC A15Power/O

Package Mechanical Specifications and Pin Information66 DatasheetVCC AE12Power/OtherVCC AE13Power/OtherVCC AE15Power/OtherVCC AE17Power/OtherVCC AE18P

Package Mechanical Specifications and Pin InformationDatasheet 67VCC E18Power/OtherVCC E20Power/OtherVCC F7Power/OtherVCC F9Power/OtherVCC F10Power/Ot

Package Mechanical Specifications and Pin Information68 DatasheetVSS AA2Power/OtherVSS AA5Power/OtherVSS AA8Power/otherVSS AA11Power/OtherVSS AA14Powe

Package Mechanical Specifications and Pin InformationDatasheet 69VSS AE26Power/OtherVSS AF2Power/OtherVSS AF6Power/OtherVSS AF8Power/OtherVSS AF11Powe

Datasheet7Introduction1 Introduction The Intel® Core™2 Duo mobile processor, Intel® Core™2 Duo mobile processor low-voltage (LV), ultra low-voltage (U

Package Mechanical Specifications and Pin Information70 DatasheetVSS E24Power/OtherVSS F2Power/OtherVSS F5Power/OtherVSS F8Power/OtherVSS F11Power/Oth

Package Mechanical Specifications and Pin InformationDatasheet 71VSS R22Power/OtherVSS R25Power/OtherVSS T1Power/OtherVSS T4Power/OtherVSS T23Power/Ot

Package Mechanical Specifications and Pin Information72 DatasheetTable 17. Pin # ListingPin # Pin NameSignal Buffer TypeDirectionA2 VSS Power/OtherA3

Package Mechanical Specifications and Pin Information73 DatasheetAB22 D[51]# Source SynchInput/OutputAB23 VSS Power/OtherAB24 D[33]# Source SynchInput

Package Mechanical Specifications and Pin InformationDatasheet 74AE13 VCC Power/OtherAE14 VSS Power/OtherAE15 VCC Power/OtherAE16 VSS Power/OtherAE17

Package Mechanical Specifications and Pin InformationDatasheet 75C8 VSS Power/OtherC9 VCC Power/OtherC10 VCC Power/OtherC11 VSS Power/OtherC12 VCC Pow

Package Mechanical Specifications and Pin Information76 DatasheetF2 VSS Power/OtherF3 RS[0]# Common Clock InputF4 RS[1]# Common Clock InputF5 VSS Powe

Package Mechanical Specifications and Pin InformationDatasheet 77K3 REQ[0]# Source SynchInput/OutputK4 VSS Power/OtherK5 A[6]# Source SynchInput/Outpu

Package Mechanical Specifications and Pin Information78 DatasheetP26 D[18]# Source SynchInput/OutputR1 A[16]# Source SynchInput/OutputR2 VSS Power/Oth

Package Mechanical Specifications and Pin InformationDatasheet 79W24 D[43]# Source SynchInput/OutputW25 D[44]# Source SynchInput/OutputW26 VSS Power/O

Introduction8 Datasheet• Digital thermal sensor (DTS)• Intel® 64 architecture • Supports enhanced Intel® Virtualization Technology• Enhanced Intel® Dy

Package Mechanical Specifications and Pin Information80 DatasheetFigure 18. Intel Core 2 Duo Mobile Processor in SFF Package Top View Upper Left SideB

Datasheet 81Package Mechanical Specifications and Pin InformationFigure 19. Intel Core 2 Duo Mobile Processor in SFF Package Top View Upper Right Side

Package Mechanical Specifications and Pin Information82 DatasheetFigure 20. Intel Core 2 Duo Mobile Processor in SFF Package Top View Lower Left SideB

Package Mechanical Specifications and Pin InformationDatasheet 83Figure 21. Intel Core 2 Duo Mobile Processor in SFF Package Top View Lower Right Side

Package Mechanical Specifications and Pin Information84 DatasheetTable 18.Intel Core 2 Duo Mobile Processor in SFF Package Listing by Ball NameSignal

Datasheet 85Package Mechanical Specifications and Pin InformationD[56]# AY36 PRDY# AV10 TMS AW5D[57]# AT40 PREQ# AV2 TRDY# L1D[58]# BC35 PROCHOT# D38

Package Mechanical Specifications and Pin Information86 DatasheetVCC AH22 VCC AP32 VCC B22VCC AH24 VCC AR33 VCC B24VCC AH26 VCC AT14 VCC B26VCC AH28 V

Datasheet 87Package Mechanical Specifications and Pin InformationVCC F24 VCC P18 VCC Y32VCC F26 VCC P20 VCCA B34VCC F28 VCC P22 VCCA D34VCC F30 VCC P2

Package Mechanical Specifications and Pin Information88 DatasheetVCCP AG13 VCCP B12 VCCP M14VCCP AG35 VCCP B14 VCCP N7VCCP AG37 VCCP B32 VCCP N9VCCP A

Datasheet 89Package Mechanical Specifications and Pin InformationVCCSENSE BD12 VSS AB42 VSS AG17VID[0] BD8 VSS AC3 VSS AG19VID[1] BC7 VSS AC15 VSS AG2

Datasheet9Introduction1.2 ReferencesMaterial and concepts available in the following documents may be beneficial when reading this document.Execute Di

Package Mechanical Specifications and Pin Information90 DatasheetVSS AL23 VSS AR29 VSS AW13VSS AL25 VSS AR31 VSS AW15VSS AL27 VSS AR35 VSS AW17VSS AL2

Datasheet 91Package Mechanical Specifications and Pin InformationVSS BA33 VSS C31 VSS H10VSS BA39 VSS C39 VSS H34VSS BA43 VSS D2 VSS H38VSS BB2 VSS D6

Package Mechanical Specifications and Pin Information92 DatasheetVSS M42 VSS U15VSS N3 VSS U17VSS N15 VSS U19VSS N17 VSS U21VSS N19 VSS U23VSS N21 VSS

Datasheet 93Package Mechanical Specifications and Pin Information4.3 Alphabetical Signals ReferenceTable 19. Signal Description (Sheet 1 of 8)Name Ty

Package Mechanical Specifications and Pin Information94 DatasheetBPRI# InputBPRI# (Bus Priority Request) is used to arbitrate for ownership of the FSB

Datasheet 95Package Mechanical Specifications and Pin InformationDEFER# InputDEFER# is asserted by an agent to indicate that a transaction cannot be e

Package Mechanical Specifications and Pin Information96 DatasheetDSTBP[3:0]#Input/OutputData strobe used to latch in D[63:0]#.FERR#/PBE# OutputFERR# (

Datasheet 97Package Mechanical Specifications and Pin InformationINIT# InputINIT# (Initialization), when asserted, resets integer registers inside the

Package Mechanical Specifications and Pin Information98 DatasheetPWRGOOD InputPWRGOOD (Power Good) is a processor input. The processor requires this s

Datasheet 99Package Mechanical Specifications and Pin InformationSTPCLK# InputSTPCLK# (Stop Clock), when asserted, causes the processor to enter a low